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Additional resources for An Introduction to Digital Techniques: Logic gates, Flip-flops, Counters and Shift registers
If the collector voltage of VT2 were used to apply bias to another transistor (VT 1), it would be of an insufficient level to turn it on. To convert the circuit to a FLIP-FLOP, the resistor R1 is connected to VT1 collector. As this is at HT at present it will not affect the bias of VT2. 2. 3 is a transistor R-S FLIP-FLOP. It is in a stable state which will continue until made to change by an external factor. g. shorted to chassis. 3, if VT2 base is taken 'low', VT2 will go off and its collector voltage will rise to HT and, via R2, VT1 will be biased on.
41 The edge triggered ~D' type circuit symbol. Output Data , - - - changes with I~I input Data. 40). To overcome the problem outlined above, edge triggered FLIP-FLOPS are available. They transfer the input terminal data on the edge of the clock pulse, and then once data has entered, will disconnect the input terminal so it has no effect on the output. CIRCUIT SYMBOL. 41. The arrow on the CK input indicates that it is positive edge triggered. That is; data enters on the positive going edge of the clock pulse.
It is also possible to make up all gates using 'NOR' packages. Complete the truth tables for the following combinations and work out the type of gate they could replace. Inputs A 8 L Outputs Inputs X A 8 L L L L H L H H L H L H H H H C D _ _ gate Outputs C D X ___ gate A c x D----B 30 x Fig. 77 Exercise 7. Fig. 78 Exercise 8. Inputs A B L Outputs Inputs X A B L L L L H L H H L H L H H H H C D E gate Outputs C Exclusive D E F X gate A---------------4. , 31 A synopsis of gate symbols Gate type . DjfV- ]VInputs 32 Output Output Output Output Output Output Output L L L L H H H L L H H L L H H H L H L L H H H H H H L L L A B L X X X H X L X X X Par t 2 Flip-flops INTRODUCTION.